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// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// File name : pwm_reg.h
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// Version : V0.1
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// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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#ifndef PWM_REG_H_
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#define PWM_REG_H_
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#include "type.h"
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#pragma anon_unions
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typedef struct
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{
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union
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{
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__IO unsigned int PWM_PR;//0x00
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struct
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{
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__IO unsigned char PWM_PR_CP0;//0x00
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__IO unsigned char PWM_PR_CP1;//0x01
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__IO unsigned char PWM_PR_DZ0;//0x02
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__IO unsigned char PWM_PR_DZ1;//0x03
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};
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};
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__IO unsigned int PWM_CSR;//0x04
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union
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{
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__IO unsigned int PWM_CR;//0x08
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struct
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{
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__IO unsigned char PWM_CR_CH0;//0x08
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__IO unsigned char PWM_CR_CH1;//0x09
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__IO unsigned char PWM_CR_CH2;//0x0a
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__IO unsigned char PWM_CR_CH3;//0x0b
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};
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};
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__IO unsigned int PWM_CNR0;//0x0c
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__IO unsigned int PWM_CMR0;//0x10
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__IO unsigned int PWM_TR0;//0x14
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__IO unsigned int PWM_CNR1;//0x18
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__IO unsigned int PWM_CMR1;//0x1c
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__IO unsigned int PWM_TR1;//0x20
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__IO unsigned int PWM_CNR2;//0x24
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__IO unsigned int PWM_CMR2;//0x28
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__IO unsigned int PWM_TR2;//0x2c
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__IO unsigned int PWM_CNR3 ;//0x30
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__IO unsigned int PWM_CMR3;//0x34
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__IO unsigned int PWM_TR3;//0x38
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__IO unsigned int PWM_IER;//0x3c
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__IO unsigned char PWM_IFR ;//0x40
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unsigned char RESERVED1[3];//0x41~0x43
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union
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{
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__IO unsigned int PWM_CCR0 ;//0x44
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struct
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{
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__IO unsigned char PWM_CCR0_CH0;//0x44
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unsigned char RESERVED2[1];//0x45
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__IO unsigned char PWM_CCR0_CH1;//0x46
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unsigned char RESERVED3[1];//0x47
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};
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};
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union
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{
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__IO unsigned int PWM_CCR1;//0x48
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struct
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{
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__IO unsigned char PWM_CCR1_CH2;//0x48
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unsigned char RESERVED4[1];//0x49
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__IO unsigned char PWM_CCR1_CH3;//0x4a
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unsigned char RESERVED5[1];//0x4b
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};
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};
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__IO unsigned int PWM_CRLR0 ;//0x4c
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__IO unsigned int PWM_CFLR0 ;//0x50
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__IO unsigned int PWM_CRLR1 ;//0x54
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__IO unsigned int PWM_CFLR1 ;//0x58
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__IO unsigned int PWM_CRLR2 ;//0x5c
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__IO unsigned int PWM_CFLR2;// 0x60)
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__IO unsigned int PWM_CRLR3;// 0x64
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__IO unsigned int PWM_CFLR3;// 0x68
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union
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{
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__IO unsigned int PWM_PCR;//0x6c
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struct
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{
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__IO unsigned char PWM_PCR_PDR;//0x6c
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__IO unsigned char PWM_PCR_PULLEN;//0x6d
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__IO unsigned char PWM_PCR_PDDR;//0x6e
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unsigned char RESERVED6[1];//0x6f
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};
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};
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}PWM_TypeDef;
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//PWM_CR
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#define CH0EN 0x00000001
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#define CH0INV 0x00000004
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#define CH0MOD 0x00000008
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#define CH1EN 0x00000001
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#define CH1INV 0x00000004
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#define CH1MOD 0x00000008
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#define CH2EN 0x00000001
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#define CH2INV 0x00000004
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#define CH2MOD 0x00000008
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#define CH3EN 0x00000001
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#define CH3INV 0x00000004
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#define CH3MOD 0x00000008
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#define DZEN0 0x00000010
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#define DZEN1 0x00000020
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//PWM_IER
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#define PIER0 0x00000001
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#define PIER1 0x00000002
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#define PIER2 0x00000004
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#define PIER3 0x00000008
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//PWM_IFR
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#define PIFR0 0x00000001
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#define PIFR1 0x00000002
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#define PIFR2 0x00000004
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#define PIFR3 0x00000008
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//PWM_CCR0&PWM_CCR1
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#define INV 0x00000001
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#define RL_IE 0x00000002
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#define FL_IE 0x00000004
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#define CAPCHxEN 0x00000008
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#define CAPIF 0x00000010
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#define CFLRD 0x00000080
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#define CRLRD 0x00000040
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#define PWM_INT_NUM 24
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#endif /* PWM_REG_H_ */
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