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/************************************************************************
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* Copyright(c) 2023 Levetop Semiconductor Co.,Led. All rights reserved.
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* @file pit.c
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* @author UartTFT Application Team
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* @version V1.0.0
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* @date 2023-02-24
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* @brief
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*************************************************************************/
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#include "pit.h"
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#include "bsp.h"
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#include "pwm.h"
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#include "data.h"
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#include "ctp.h"
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#include "pit32_drv.h"
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#include "sys.h"
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#include "dac.h"
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#include "pwm_drv.h"
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#include "uart.h"
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#include "meg.h"
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uint8_t flag_MB_REG[20];
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#if (UARTBUS_OPTION == 0 || UARTBUS_OPTION == 3 || UARTBUS_OPTION == 4)
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// Dynamic display timer
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void PIT1_Init(void)
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{
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NVIC_Init(1, 0, PIT1_IRQn, 2);
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PIT1->PCSR &= (~PCSR_EN);
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PIT1->PCSR = (5 << 8) | PCSR_OVW | PCSR_PIE | PCSR_RLD | PCSR_PDBG; // 75mhz/32 Interrupt mode
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#if OSC_Frequency
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PIT1->PMR = 23437; // 10ms
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#else
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PIT1->PMR = 18749; // 10ms
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#endif
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PIT1->PCSR |= PCSR_EN;
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}
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//void PIT1_IRQHandler(void)
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//{
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// PIT1->PCSR |= (1 << 2); // clear PIF interrupt flag
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//// printf("enter pit interrupt.\r\n");
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// if(scr_flag == 1)
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// scr_time++;
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//
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//
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// if (Var_Count_num > 0)
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// Var_Count_flag = 1;
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// if(Pointer_Count_num >0)
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// Pointer_Count_flag = 1;
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// if (Gif_num > 0)
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// Gif_flag = 1;
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// if (Adj_loop > 0)
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// Adj_time++;
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// if (DioKb_flag == 1)
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// Cusor_time++;
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// if (AioKb_flag == 1)
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// Cusor_time++;
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// if (GBKioKb_flag == 1)
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// Cusor_time++;
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// if (Scroll_num > 0)
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// Scroll_flag = 1;
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// if (curve_num > 0)
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// curve_flag = 1;
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// if (Backlight_flag)
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// Backlight_count++;
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// if (buzzer_start)
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// {
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// buzzer_10ms_count++;
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// if (buzzer_10ms_count >= 5)
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// {
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// UART_WriteGpioData(SCI2, UART_TX, Bit_RESET);
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// buzzer_start = 0;
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// buzzer_10ms_count = 0;
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// }
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// }
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// page_refreshing++;
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// if(ctp_press_t < 0xFF) ctp_press_t++;
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//#if encoder_on
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// if (SW_flag4 != 2 || SW_flag4 != 3)
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// key_time++;
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// if (Encoder_read_Flag == 1)
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// {
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// Backlight_count = 0;
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// if (Encoder_type == 0)
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// {
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// Encoder_time++;
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// if (Encoder_time > 1)
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// {
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// if (Read_Encoder_key == 1)
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// {
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// Encoder_read_Flag = 0;
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// Encoder_time = 0;
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// key_time = 0;
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// SW_flag = 1;
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// }
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// }
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// }
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// else if (Encoder_type == 4)
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// {
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// Encoder_time++;
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// if (Encoder_time > 1)
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// {
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// if (SW_flag4 == 1)
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// {
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// SW_flag4 = 2;
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// SW_flag = 3;
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// Encoder_read_Flag = 0;
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// Encoder_time = 0;
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// key_time = 0;
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// }
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// if (Encoder_time > (Long_press * 5) && SW_flag4 != 3)
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// {
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// SW_flag4 = 3;
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// SW_flag = 4;
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// Encoder_read_Flag = 0;
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// Encoder_time = 0;
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// key_time = 0;
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//
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// }
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// if (Read_Encoder_key == 1 && SW_flag4 != 2)
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// {
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// SW_flag4 = 1;
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// Encoder_read_Flag = 0;
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// Encoder_time = 0;
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// key_time = 0;
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// }
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// }
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// }
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// }
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// if (SW_flag4 == 1)
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// {
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// Encoder_time++;
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// if (Encoder_time > Double_click_interval * 5) // Double-click valid time exceeded
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// {
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// SW_flag4 = 1;
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// SW_flag = 2;
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// }
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// }
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// if (Enc1)
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// {
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// Encoder_Freetime++;
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// if (Encoder_Freetime > 100)
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// {
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// Encoder_Freetime = 0;
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// knob_dir = 0;
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// Enc1 = 0;
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// }
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// }
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//#endif
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//}
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#endif
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volatile uint8_t Addr_ModBus_Sla = 0x01;
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#if (UARTBUS_OPTION == 1)
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void PIT1_Init(void)
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{
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NVIC_Init(1, 0, PIT1_IRQn, 2);
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PIT1->PCSR &= (~PCSR_EN);
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PIT1->PCSR = (3 << 8) | PCSR_OVW | PCSR_PIE | PCSR_RLD | PCSR_PDBG; // 75mhz/8 Interrupt mode
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#if OSC_Frequency
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PIT1->PMR = 9375; // 1ms
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#else
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PIT1->PMR = 7500;
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#endif
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PIT1->PCSR |= PCSR_EN;
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}
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#define MB_ERR_CMD 0x01
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#define MB_ERR_ADDR 0x02
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#define MB_ERR_DATA 0x03
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#define MB_ERR_FAULT 0x04
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volatile MB_CMD_RXINFO gMB_CMDRX;
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volatile uint8_t MB_SLA_RXBUF[256] = {0};
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volatile uint16_t MB_SLA_Len = 0;
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volatile uint8_t Feedback_ModbusBuf[256] = {0};
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volatile uint32_t pit_1ms_count = 0;
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volatile uint8_t uart_flag = 0;
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volatile uint32_t pit_1ms_count2 = 0;
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void PIT1_IRQHandler(void)
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{
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uint16_t CRC_MCU = 0, CRC_RX = 0;
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uint16_t i = 0, j = 0;
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uint8_t num = 0, cnt = 0;
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uint16_t temp = 0;
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PIT1->PCSR |= PCSR_PIF; // clear PIF interrupt flag
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pit_1ms_count++;
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pit_1ms_count2++;
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// If the serial port is detected for 5ms and no data is received, the reception is completed
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if (pit_1ms_count == 5 && uart_flag)
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{
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pit_1ms_count = 0;
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uart_flag = 0;
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MB_SLA_Len = gUsartRx.Count;
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memcpy(MB_SLA_RXBUF, gUsartRx.Buf, MB_SLA_Len);
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gUsartRx.Count = 0;
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if (MB_SLA_RXBUF[0] == Addr_ModBus_Sla || MB_SLA_RXBUF[0] == 0) // Transceiver node consistency or broadcast mode
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{
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CRC_MCU = (MB_SLA_RXBUF[MB_SLA_Len - 1] << 8) + (MB_SLA_RXBUF[MB_SLA_Len - 2] & 0x00FF);
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CRC_RX = CRC16(MB_SLA_RXBUF, MB_SLA_Len - 2);
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if (CRC_MCU == CRC_RX) // CRC check is correct
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{
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gMB_CMDRX.CMD = MB_SLA_RXBUF[1];
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gMB_CMDRX.Addr = MB_SLA_RXBUF[2] << 8 | MB_SLA_RXBUF[3];
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// Read command response (broadcast mode read function is meaningless)
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if (gMB_CMDRX.CMD == 0x03 && MB_SLA_RXBUF[0] != 0)
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{
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gMB_CMDRX.Num = MB_SLA_RXBUF[4] << 8 | MB_SLA_RXBUF[5];
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if (gMB_CMDRX.Addr <= 0x6FFF)
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{
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Feedback_ModbusBuf[0] = Addr_ModBus_Sla;
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Feedback_ModbusBuf[1] = gMB_CMDRX.CMD;
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Feedback_ModbusBuf[2] = 2 * gMB_CMDRX.Num;
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for (i = 0; i < gMB_CMDRX.Num; i++)
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{
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Feedback_ModbusBuf[3 + 2 * i] = var[2 * (gMB_CMDRX.Addr + i)];
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Feedback_ModbusBuf[4 + 2 * i] = var[2 * (gMB_CMDRX.Addr + i) + 1];
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}
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LT_SendData_CRC_NoFrame(Feedback_ModbusBuf, 3 + Feedback_ModbusBuf[2]);
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}
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else if (gMB_CMDRX.Addr >= 0x7000 && gMB_CMDRX.Addr <= 0x71FF)
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{
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if (gMB_CMDRX.Addr <= 0x7007 || gMB_CMDRX.Addr + gMB_CMDRX.Num >= 0x7002)
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{
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var[0x7002 * 2 + 1] = calendar.w_year - 2000;
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var[0x7003 * 2 + 1] = calendar.w_month;
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var[0x7004 * 2 + 1] = calendar.w_date;
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var[0x7005 * 2 + 1] = calendar.hour;
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var[0x7006 * 2 + 1] = calendar.min;
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var[0x7007 * 2 + 1] = calendar.sec;
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}
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Feedback_ModbusBuf[0] = Addr_ModBus_Sla;
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Feedback_ModbusBuf[1] = gMB_CMDRX.CMD;
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Feedback_ModbusBuf[2] = 2 * gMB_CMDRX.Num;
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for (i = 0; i < gMB_CMDRX.Num; i++)
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{
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Feedback_ModbusBuf[3 + 2 * i] = var[2 * (gMB_CMDRX.Addr + i)];
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Feedback_ModbusBuf[4 + 2 * i] = var[2 * (gMB_CMDRX.Addr + i) + 1];
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}
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LT_SendData_CRC_NoFrame(Feedback_ModbusBuf, 3 + Feedback_ModbusBuf[2]);
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}
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else
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{
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Feedback_ModbusBuf[0] = Addr_ModBus_Sla;
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Feedback_ModbusBuf[1] = gMB_CMDRX.CMD + 0x80;
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Feedback_ModbusBuf[2] = MB_ERR_ADDR;
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LT_SendData_CRC_NoFrame(Feedback_ModbusBuf, 3);
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}
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}
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else if (gMB_CMDRX.CMD == 0x06) // Write instruction response
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{
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if (gMB_CMDRX.Addr <= 0x6FFF)
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{
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var[2 * gMB_CMDRX.Addr] = MB_SLA_RXBUF[4];
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var[2 * gMB_CMDRX.Addr + 1] = MB_SLA_RXBUF[5];
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if (MB_SLA_RXBUF[0] != 0)
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LT_SendData_CRC_NoFrame(MB_SLA_RXBUF, 6);
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}
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else if (gMB_CMDRX.Addr >= 0x7000 && gMB_CMDRX.Addr <= 0x71FF)
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{
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var[2 * gMB_CMDRX.Addr] = MB_SLA_RXBUF[4];
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var[2 * gMB_CMDRX.Addr + 1] = MB_SLA_RXBUF[5];
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flag_MB_REG[gMB_CMDRX.Addr - 0x7000] = 1;
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if (MB_SLA_RXBUF[0] != 0)
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LT_SendData_CRC_NoFrame(MB_SLA_RXBUF, 6);
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}
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else
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{
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Feedback_ModbusBuf[0] = Addr_ModBus_Sla;
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Feedback_ModbusBuf[1] = gMB_CMDRX.CMD + 0x80;
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Feedback_ModbusBuf[2] = MB_ERR_ADDR;
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if (MB_SLA_RXBUF[0] != 0)
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LT_SendData_CRC_NoFrame(Feedback_ModbusBuf, 3);
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}
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}
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else if (gMB_CMDRX.CMD == 0x10) // Write multiple instruction response
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{
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gMB_CMDRX.Num = MB_SLA_RXBUF[4] << 8 | MB_SLA_RXBUF[5];
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if (gMB_CMDRX.Addr <= 0x6FFF) // In the variable area
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{
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// Save data
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for (i = 0; i < gMB_CMDRX.Num; i++)
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{
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var[2 * (gMB_CMDRX.Addr + i)] = MB_SLA_RXBUF[7 + 2 * i];
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var[2 * (gMB_CMDRX.Addr + i) + 1] = MB_SLA_RXBUF[8 + 2 * i];
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}
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if (MB_SLA_RXBUF[0] != 0)
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LT_SendData_CRC_NoFrame(MB_SLA_RXBUF, 6);
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}
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else if (gMB_CMDRX.Addr >= 0x7000 && gMB_CMDRX.Addr <= 0x71FF) // In register area
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{
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for (i = 0; i < gMB_CMDRX.Num; i++)
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{
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var[2 * (gMB_CMDRX.Addr + i)] = MB_SLA_RXBUF[7 + 2 * i];
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var[2 * (gMB_CMDRX.Addr + i) + 1] = MB_SLA_RXBUF[8 + 2 * i];
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flag_MB_REG[gMB_CMDRX.Addr - 0x7000 + i] = 1;
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}
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if (MB_SLA_RXBUF[0] != 0)
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LT_SendData_CRC_NoFrame(MB_SLA_RXBUF, 6);
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}
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else if (gMB_CMDRX.Addr >= 0xC001 && gMB_CMDRX.Addr <= 0xCFFF) // Curve channel write data
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{
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gMB_CMDRX.Num = MB_SLA_RXBUF[4] << 8 | MB_SLA_RXBUF[5];
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temp = gMB_CMDRX.Addr & 0xFFF;
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for (i = 0; i < Curve_Size; i++)
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{
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if (temp & (1 << i))
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num++; // Record how many groups of channels
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}
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i = 0;
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j = 0;
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while (j < gMB_CMDRX.Num) // Store data to corresponding channels respectively
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{
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if (temp & (1 << i))
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{
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Curve_buff[i][Curve_count[i]] = MB_SLA_RXBUF[7 + 2 * j] << 8 | MB_SLA_RXBUF[8 + 2 * j];
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Curve_count[i]++;
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if (Curve_count[i] >= 1024)
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{
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Curve_count[i] = 0;
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}
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curve_update_flag[i] = 1;
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j++;
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}
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i++;
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if (i >= Curve_Size)
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i = 0;
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}
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/* A consensus was reached that when multi-channel buffering data was triggered,
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if some channel data was missing, the missing part would be supplemented */
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if (gMB_CMDRX.Num % num)
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{
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for (i = 0; i < Curve_Size; i++)
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{
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if (temp & (1 << i))
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cnt++;
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if (cnt > gMB_CMDRX.Num % num && (temp & (1 << i)))
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{
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if (Curve_count[i] != 0)
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Curve_buff[i][Curve_count[i]] = Curve_buff[i][Curve_count[i] - 1];
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else
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Curve_buff[i][0] = Curve_buff[i][1023];
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Curve_count[i]++;
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if (Curve_count[i] >= 1024)
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{
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Curve_count[i] = 0;
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}
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}
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}
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}
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if (MB_SLA_RXBUF[0] != 0)
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LT_SendData_CRC_NoFrame(MB_SLA_RXBUF, 6);
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}
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else if (gMB_CMDRX.Addr >= 0xE001 && gMB_CMDRX.Addr <= 0xEFFF) // Curve Channel Clear Data
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{
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temp = gMB_CMDRX.Addr & 0xFFF;
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for (i = 0; i < Curve_Size; i++) // Store data to corresponding channels respectively
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{
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if (temp & (1 << i))
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{
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for (j = 0; j < 1024; j++)
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{
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Curve_buff[i][j] = 0x00;
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}
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Curve_count[i] = 0;
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curve_update_flag[i] = 1;
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}
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}
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|
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if (MB_SLA_RXBUF[0] != 0)
|
|
|
LT_SendData_CRC_NoFrame(MB_SLA_RXBUF, 6);
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
Feedback_ModbusBuf[0] = Addr_ModBus_Sla;
|
|
|
Feedback_ModbusBuf[1] = gMB_CMDRX.CMD + 0x80;
|
|
|
Feedback_ModbusBuf[2] = MB_ERR_ADDR;
|
|
|
if (MB_SLA_RXBUF[0] != 0)
|
|
|
LT_SendData_CRC_NoFrame(Feedback_ModbusBuf, 3);
|
|
|
}
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
Feedback_ModbusBuf[0] = Addr_ModBus_Sla;
|
|
|
Feedback_ModbusBuf[1] = gMB_CMDRX.CMD + 0x80;
|
|
|
Feedback_ModbusBuf[2] = MB_ERR_CMD;
|
|
|
if (MB_SLA_RXBUF[0] != 0)
|
|
|
LT_SendData_CRC_NoFrame(Feedback_ModbusBuf, 3);
|
|
|
}
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
}
|
|
|
}
|
|
|
else // The sending and receiving nodes are inconsistent
|
|
|
{
|
|
|
}
|
|
|
}
|
|
|
|
|
|
if (pit_1ms_count2 >= 10)
|
|
|
{
|
|
|
pit_1ms_count2 = 0;
|
|
|
|
|
|
if (Var_Count_num > 0)
|
|
|
Var_Count_flag = 1;
|
|
|
if(Pointer_Count_num >0)
|
|
|
Pointer_Count_flag = 1;
|
|
|
if (Gif_num > 0)
|
|
|
Gif_flag = 1;
|
|
|
if (Adj_loop > 0)
|
|
|
Adj_time++;
|
|
|
if (DioKb_flag == 1)
|
|
|
Cusor_time++;
|
|
|
if (AioKb_flag == 1)
|
|
|
Cusor_time++;
|
|
|
if (GBKioKb_flag == 1)
|
|
|
Cusor_time++;
|
|
|
if (Scroll_num > 0)
|
|
|
Scroll_flag = 1;
|
|
|
if (curve_num > 0)
|
|
|
curve_flag = 1;
|
|
|
if (Backlight_flag)
|
|
|
Backlight_count++;
|
|
|
if (buzzer_start)
|
|
|
{
|
|
|
buzzer_10ms_count++;
|
|
|
if (buzzer_10ms_count >= 5)
|
|
|
{
|
|
|
UART_WriteGpioData(SCI2, UART_TX, Bit_RESET);
|
|
|
buzzer_start = 0;
|
|
|
buzzer_10ms_count = 0;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
page_refreshing++;
|
|
|
if(ctp_press_t < 0xFF) ctp_press_t++;
|
|
|
|
|
|
#if encoder_on
|
|
|
|
|
|
if (SW_flag4 != 2 || SW_flag4 != 3)
|
|
|
key_time++;
|
|
|
|
|
|
if (Encoder_read_Flag == 1)
|
|
|
{
|
|
|
Backlight_count = 0;
|
|
|
if (Encoder_type == 0)
|
|
|
{
|
|
|
Encoder_time++;
|
|
|
if (Encoder_time > 1)
|
|
|
{
|
|
|
if (Read_Encoder_key == 1)
|
|
|
{
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
SW_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
else if (Encoder_type == 4)
|
|
|
{
|
|
|
Encoder_time++;
|
|
|
if (Encoder_time > 1)
|
|
|
{
|
|
|
if (SW_flag4 == 1)
|
|
|
{
|
|
|
SW_flag4 = 2;
|
|
|
SW_flag = 3;
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
}
|
|
|
if (Encoder_time > (Long_press * 5) && SW_flag4 != 3)
|
|
|
{
|
|
|
SW_flag4 = 3;
|
|
|
SW_flag = 4;
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
}
|
|
|
if (Read_Encoder_key == 1)
|
|
|
{
|
|
|
SW_flag4 = 1;
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
if (SW_flag4 == 1)
|
|
|
{
|
|
|
Encoder_time++;
|
|
|
if (Encoder_time > Double_click_interval * 5) // Double-click valid time exceeded
|
|
|
{
|
|
|
SW_flag4 = 1;
|
|
|
SW_flag = 2;
|
|
|
}
|
|
|
}
|
|
|
if (Enc1)
|
|
|
{
|
|
|
Encoder_Freetime++;
|
|
|
if (Encoder_Freetime > 100)
|
|
|
{
|
|
|
Encoder_Freetime = 0;
|
|
|
knob_dir = 0;
|
|
|
Enc1 = 0;
|
|
|
}
|
|
|
}
|
|
|
#endif
|
|
|
}
|
|
|
}
|
|
|
|
|
|
#endif
|
|
|
|
|
|
#if (UARTBUS_OPTION == 2)
|
|
|
void PIT1_Init(void)
|
|
|
{
|
|
|
NVIC_Init(1, 0, PIT1_IRQn, 2);
|
|
|
|
|
|
PIT1->PCSR &= (~PCSR_EN);
|
|
|
PIT1->PCSR = (3 << 8) | PCSR_OVW | PCSR_PIE | PCSR_RLD | PCSR_PDBG; // 75mhz/8 Interrupt mode
|
|
|
#if OSC_Frequency
|
|
|
PIT1->PMR = 9375; // 1ms
|
|
|
#else
|
|
|
PIT1->PMR = 7500;
|
|
|
#endif
|
|
|
PIT1->PCSR |= PCSR_EN;
|
|
|
}
|
|
|
|
|
|
volatile uint32_t pit_1ms_count = 0;
|
|
|
volatile uint8_t uart_flag = 0;
|
|
|
|
|
|
volatile uint32_t pit_1ms_count2 = 0;
|
|
|
volatile uint32_t tx_10ms_cnt = 0;
|
|
|
volatile uint8_t tx_500ms_flag = 0;
|
|
|
|
|
|
volatile uint32_t pit_1ms_count3 = 0;
|
|
|
volatile uint8_t timeout_flag = 0;
|
|
|
volatile uint8_t MB_SLA_RXBUF[256] = {0};
|
|
|
volatile uint16_t MB_SLA_Len = 0;
|
|
|
void PIT1_IRQHandler(void)
|
|
|
{
|
|
|
uint16_t CRC_MCU = 0, CRC_RX = 0;
|
|
|
uint16_t i = 0;
|
|
|
|
|
|
PIT1->PCSR |= PCSR_PIF; // clear PIF interrupt flag
|
|
|
pit_1ms_count++;
|
|
|
pit_1ms_count2++;
|
|
|
pit_1ms_count3++;
|
|
|
|
|
|
if (pit_1ms_count >= 5 && uart_flag) // If the serial port is detected for 5ms and no data is received, the reception is completed
|
|
|
{
|
|
|
pit_1ms_count = 0;
|
|
|
uart_flag = 0;
|
|
|
gUsartRx.Flag = 1;
|
|
|
|
|
|
MB_SLA_Len = gUsartRx.Count;
|
|
|
memcpy(MB_SLA_RXBUF, gUsartRx.Buf, MB_SLA_Len);
|
|
|
gUsartRx.Count = 0;
|
|
|
|
|
|
CRC_MCU = (MB_SLA_RXBUF[MB_SLA_Len - 1] << 8) + (MB_SLA_RXBUF[MB_SLA_Len - 2] & 0x00FF);
|
|
|
CRC_RX = CRC16(MB_SLA_RXBUF, MB_SLA_Len - 2);
|
|
|
|
|
|
if (CRC_MCU == CRC_RX) // CRC check is correct
|
|
|
{
|
|
|
if (MB_SLA_RXBUF[0] == gUsartTx.Sla_Add) // The sending and receiving nodes are consistent
|
|
|
{
|
|
|
pit_1ms_count3 = 0;
|
|
|
timeout_flag = 0;
|
|
|
|
|
|
if (MB_SLA_RXBUF[1] == gUsartTx.CMD)
|
|
|
{
|
|
|
if (gUsartTx.CMD == 0x01 || gUsartTx.CMD == 0x02) // Read command response
|
|
|
{
|
|
|
if ( (gUsartTx.Len%8==0 && gUsartTx.Len/8==MB_SLA_RXBUF[2]) || (gUsartTx.Len%8!=0 && gUsartTx.Len/8+1==MB_SLA_RXBUF[2]) ) // Judge whether the number of read bytes sent and responded is the same
|
|
|
{
|
|
|
for (i = 0; i < gUsartTx.Len; i++) // Save variables
|
|
|
{
|
|
|
//For debug
|
|
|
// if( MB_SLA_RXBUF[3+i/8]&(1<<(i%8)) )
|
|
|
// var[2 * (gUsartTx.Var_Add) + (gUsartTx.REG_Add%8+i)/8] |= 1<<( (gUsartTx.REG_Add+i)%8);
|
|
|
// else
|
|
|
// var[2 * (gUsartTx.Var_Add) + (gUsartTx.REG_Add%8+i)/8] &=~(1<<( (gUsartTx.REG_Add+i)%8) );
|
|
|
|
|
|
if( (gUsartTx.REG_Add+i)%16 < 8)
|
|
|
{
|
|
|
if( MB_SLA_RXBUF[3+i/8]&(1<<(i%8)) )
|
|
|
var[2 * (gUsartTx.Var_Add + (gUsartTx.REG_Add%8+i)/16)+1] |= 1<<( (gUsartTx.REG_Add+i)%8);
|
|
|
else
|
|
|
var[2 * (gUsartTx.Var_Add + (gUsartTx.REG_Add%8+i)/16)+1] &=~(1<<( (gUsartTx.REG_Add+i)%8) );
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
if( MB_SLA_RXBUF[3+i/8]&(1<<(i%8)) )
|
|
|
var[2 * (gUsartTx.Var_Add + (gUsartTx.REG_Add%8+i)/16)] |= 1<<( (gUsartTx.REG_Add+i)%8);
|
|
|
else
|
|
|
var[2 * (gUsartTx.Var_Add + (gUsartTx.REG_Add%8+i)/16)] &=~(1<<( (gUsartTx.REG_Add+i)%8) );
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/* Customization
|
|
|
if(Master_mode03_flag[0] == 1) //?????Code_????????????§Õ??????¡À??????????????????????
|
|
|
{
|
|
|
var[0x2002*2] = Master_mode03_Var[0];
|
|
|
var[0x2002*2+1] = Master_mode03_Var[1];
|
|
|
}
|
|
|
if(Master_mode03_flag[1] == 1) //?????Code_????????????§Õ??????¡À??????????????????????
|
|
|
{
|
|
|
var[0x2003*2] = Master_mode03_Var[2];
|
|
|
var[0x2003*2+1] = Master_mode03_Var[3];
|
|
|
}
|
|
|
*/
|
|
|
|
|
|
if (gUsartTx.Mode == 0x02) // Data clearing of parameter pointer address in mode 2
|
|
|
{
|
|
|
var[2 * (gUsartTx.Opt_Add)] = 0;
|
|
|
var[2 * (gUsartTx.Opt_Add) + 1] = 0;
|
|
|
}
|
|
|
else if (gUsartTx.Mode == 0x03) // Customized Code_ The flag bit corresponding to mode 3 is cleared
|
|
|
{
|
|
|
Master_mode03_flag[gUsartTx.Opt_Add] = 0;
|
|
|
}
|
|
|
tx_repeat_cnt = 0;
|
|
|
tx_repeat_flag = 0; // The response will not need to be retransmitted, and the next command will be executed
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
tx_repeat_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
else if (gUsartTx.CMD == 0x03 || gUsartTx.CMD == 0x04) // Read command response
|
|
|
{
|
|
|
if (gUsartTx.Len == MB_SLA_RXBUF[2] / 2) // Judge whether the number of read bytes sent and responded is the same
|
|
|
{
|
|
|
for (i = 0; i < MB_SLA_RXBUF[2] / 2; i++) // Save variables
|
|
|
{
|
|
|
var[2 * (gUsartTx.Var_Add) + 2 * i] = MB_SLA_RXBUF[3 + 2 * i];
|
|
|
var[2 * (gUsartTx.Var_Add) + 2 * i + 1] = MB_SLA_RXBUF[3 + 2 * i + 1];
|
|
|
|
|
|
if (gUsartTx.Var_Add >= 0x7000 && gUsartTx.Var_Add <= 0x71FF)
|
|
|
{
|
|
|
flag_MB_REG[gUsartTx.Var_Add - 0x7000 + i] = 1;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
/* Customization
|
|
|
if(Master_mode03_flag[0] == 1) //?????Code_????????????§Õ??????¡À??????????????????????
|
|
|
{
|
|
|
var[0x2002*2] = Master_mode03_Var[0];
|
|
|
var[0x2002*2+1] = Master_mode03_Var[1];
|
|
|
}
|
|
|
if(Master_mode03_flag[1] == 1) //?????Code_????????????§Õ??????¡À??????????????????????
|
|
|
{
|
|
|
var[0x2003*2] = Master_mode03_Var[2];
|
|
|
var[0x2003*2+1] = Master_mode03_Var[3];
|
|
|
}
|
|
|
*/
|
|
|
|
|
|
if (gUsartTx.Mode == 0x02) // Data clearing of parameter pointer address in mode 2
|
|
|
{
|
|
|
var[2 * (gUsartTx.Opt_Add)] = 0;
|
|
|
var[2 * (gUsartTx.Opt_Add) + 1] = 0;
|
|
|
}
|
|
|
else if (gUsartTx.Mode == 0x03) // Customized Code_ The flag bit corresponding to mode 3 is cleared
|
|
|
{
|
|
|
Master_mode03_flag[gUsartTx.Opt_Add] = 0;
|
|
|
}
|
|
|
tx_repeat_cnt = 0;
|
|
|
tx_repeat_flag = 0; // The response will not need to be retransmitted, and the next command will be executed
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
tx_repeat_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
else if (gUsartTx.CMD == 0x05 || gUsartTx.CMD == 0x06) // Write instruction response
|
|
|
{
|
|
|
if (gUsartTx.REG_Add == (MB_SLA_RXBUF[2] << 8 | MB_SLA_RXBUF[3])) // Judge whether the register address of sending and responding is the same
|
|
|
{
|
|
|
if (gUsartTx.Mode == 0x02) // Data clearing of parameter pointer address in mode 2
|
|
|
{
|
|
|
var[2 * (gUsartTx.Opt_Add)] = 0;
|
|
|
var[2 * (gUsartTx.Opt_Add) + 1] = 0;
|
|
|
}
|
|
|
else if (gUsartTx.Mode == 0x03) // Customized Code_ The flag bit corresponding to mode 3 is cleared
|
|
|
{
|
|
|
Master_mode03_flag[gUsartTx.Opt_Add] = 0;
|
|
|
}
|
|
|
tx_repeat_cnt = 0;
|
|
|
tx_repeat_flag = 0; // The response will not need to be retransmitted, and the next command will be executed
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
tx_repeat_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
else if (gUsartTx.CMD == 0x0F || gUsartTx.CMD == 0x10) // Write multiple instruction response
|
|
|
{
|
|
|
if (gUsartTx.REG_Add == (MB_SLA_RXBUF[2] << 8 | MB_SLA_RXBUF[3])) // Judge whether the register address of sending and responding is the same
|
|
|
{
|
|
|
if (gUsartTx.Mode == 0x02) // Data clearing of parameter pointer address in mode 2
|
|
|
{
|
|
|
var[2 * (gUsartTx.Opt_Add)] = 0;
|
|
|
var[2 * (gUsartTx.Opt_Add) + 1] = 0;
|
|
|
}
|
|
|
else if (gUsartTx.Mode == 0x03) // Customized Code_ The flag bit corresponding to mode 3 is cleared
|
|
|
{
|
|
|
Master_mode03_flag[gUsartTx.Opt_Add] = 0;
|
|
|
}
|
|
|
tx_repeat_cnt = 0;
|
|
|
tx_repeat_flag = 0; // The response will not need to be retransmitted, and the next command will be executed
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
tx_repeat_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
else // Resend if the answer is wrong
|
|
|
{
|
|
|
tx_repeat_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
else // Resend if the sending and receiving nodes are inconsistent
|
|
|
{
|
|
|
tx_repeat_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
else
|
|
|
{
|
|
|
tx_repeat_flag = 1; // Resend if CRC check error
|
|
|
}
|
|
|
if (gUsartTx.Sla_Add != 0)
|
|
|
tx_en_flag = 1; // After receiving a frame of unicast mode slave response, it is allowed to send flag bit enable
|
|
|
}
|
|
|
|
|
|
if (pit_1ms_count3 > gUsartTx.Timeout && timeout_flag)
|
|
|
{
|
|
|
pit_1ms_count3 = 0;
|
|
|
timeout_flag = 0;
|
|
|
tx_repeat_flag = 1;
|
|
|
tx_en_flag = 1; // After receiving a frame, allow to send flag bit enable
|
|
|
}
|
|
|
|
|
|
if (pit_1ms_count2 > 10)
|
|
|
{
|
|
|
pit_1ms_count2 = 0;
|
|
|
|
|
|
tx_10ms_cnt++;
|
|
|
if (tx_10ms_cnt > 50)
|
|
|
{
|
|
|
|
|
|
tx_500ms_flag = 1;
|
|
|
}
|
|
|
|
|
|
if (Gif_num > 0)
|
|
|
Gif_flag = 1;
|
|
|
if (Adj_loop > 0)
|
|
|
Adj_time++;
|
|
|
if (DioKb_flag == 1)
|
|
|
Cusor_time++;
|
|
|
if (AioKb_flag == 1)
|
|
|
Cusor_time++;
|
|
|
if (GBKioKb_flag == 1)
|
|
|
Cusor_time++;
|
|
|
if (Scroll_num > 0)
|
|
|
Scroll_flag = 1;
|
|
|
if (curve_num > 0)
|
|
|
curve_flag = 1;
|
|
|
if (Backlight_flag)
|
|
|
Backlight_count++;
|
|
|
if (buzzer_start)
|
|
|
{
|
|
|
buzzer_10ms_count++;
|
|
|
if (buzzer_10ms_count >= 5)
|
|
|
{
|
|
|
UART_WriteGpioData(SCI2, UART_TX, Bit_RESET);
|
|
|
buzzer_start = 0;
|
|
|
buzzer_10ms_count = 0;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
page_refreshing++;
|
|
|
if(ctp_press_t < 0xFF) ctp_press_t++;
|
|
|
|
|
|
#if encoder_on
|
|
|
|
|
|
if (SW_flag4 != 2 || SW_flag4 != 3)
|
|
|
key_time++;
|
|
|
|
|
|
if (Encoder_read_Flag == 1)
|
|
|
{
|
|
|
Backlight_count = 0;
|
|
|
if (Encoder_type == 0)
|
|
|
{
|
|
|
Encoder_time++;
|
|
|
if (Encoder_time > 1)
|
|
|
{
|
|
|
if (Read_Encoder_key == 1)
|
|
|
{
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
SW_flag = 1;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
else if (Encoder_type == 4)
|
|
|
{
|
|
|
Encoder_time++;
|
|
|
if (Encoder_time > 1)
|
|
|
{
|
|
|
if (SW_flag4 == 1)
|
|
|
{
|
|
|
SW_flag4 = 2;
|
|
|
SW_flag = 3;
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
}
|
|
|
if (Encoder_time > (Long_press * 5) && SW_flag4 != 3)
|
|
|
{
|
|
|
SW_flag4 = 3;
|
|
|
SW_flag = 4;
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
}
|
|
|
if (Read_Encoder_key == 1)
|
|
|
{
|
|
|
SW_flag4 = 1;
|
|
|
Encoder_read_Flag = 0;
|
|
|
Encoder_time = 0;
|
|
|
key_time = 0;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
if (SW_flag4 == 1)
|
|
|
{
|
|
|
Encoder_time++;
|
|
|
if (Encoder_time > Double_click_interval * 5) // Double-click valid time exceeded
|
|
|
{
|
|
|
SW_flag4 = 1;
|
|
|
SW_flag = 2;
|
|
|
}
|
|
|
}
|
|
|
if (Enc1)
|
|
|
{
|
|
|
Encoder_Freetime++;
|
|
|
if (Encoder_Freetime > 100)
|
|
|
{
|
|
|
Encoder_Freetime = 0;
|
|
|
knob_dir = 0;
|
|
|
Enc1 = 0;
|
|
|
}
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
}
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
// Disable timer 14
|
|
|
void LT_UsartTimeDisable(void)
|
|
|
{
|
|
|
PIT1->PCSR &= ~PCSR_PIE;
|
|
|
PIT1->PCSR &= ~PCSR_EN;
|
|
|
}
|
|
|
|
|
|
// Enable timer 14
|
|
|
void LT_UsartTimeEnable(void)
|
|
|
{
|
|
|
|
|
|
PIT1->PCSR |= PCSR_PIE;
|
|
|
PIT1->PCSR |= PCSR_EN;
|
|
|
}
|
|
|
|
|
|
// Set timer 14 load value
|
|
|
void LT_UsartTimeSetCounter(UINT32 Counter)
|
|
|
{
|
|
|
PIT1->PMR = Counter;
|
|
|
PIT1->PCSR |= PCSR_PIF;
|
|
|
LT_UsartTimeEnable();
|
|
|
}
|